In this novel approach, the structures of the MEMS sensor are deposited, without the need for solder or wire, on the circuits of an already fabricated chip in a vertical, monolithic integration process. The project developed the design of a new MEMS device as well as the necessary low-temperature deposition of thick, conductive, low-stress silicon folms (10 - 20 µm at T < 420 °C).
Development of a simulative understanding of the hot-wire CVD process and use of the same in the deposition of low-stress, doped silicon films on pre-processed 8" silicon wafers. In addition to the large-area CVD hot-wire process, which is able to deposit low-stress coatings evenly over large areas (50 x 50 cm²) at a high rate (2 nm/s), the institute's own simulation environment for low-pressure coating processes was used to obtain optimum coating properties.
The simulation delivers the species produced on the hot wire (H, SiH2, SiH3, Si2H2, ...) as a function of the silane and hydrogen flow and their influence on film formation. The most important process parameters here were identified and implemented during film production. In the future, the technology will be optimized in collaboration with industrial partners and brought into application.